基本采样与保持电路

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Chapter 5 Data Acquisition Circuits
第五章 数据采集电路
Prof. Dehan Luo
Section One Sample and hold (第一节 采样与保持)
1、Architecture of data acquisition systems 2、Sample & hold and Basic S/H circuit 3、S/H response characteristics Section Two Multiplexing circuits(第二节 多路开关电路) 1、Multiplexers 2、FET analog switches Section Three Analog to digital converters(第三节 模数转换器) 1、 Single slope or ramp 2、 Successive approximation 3、Dual slope 4、Parallel or ‘flash’
Intelligent Sensors System 5-5 School of Information Engineering
Chapter 5 Data Acquisition Circuits
Sample & hold and Basic S/H circuit (Cont.)(续) 4、Considerations for choosing C(电容C的选择)
Chapter 5 Data Acquisition Circuits Section One Sample and hold
第一节 采样与保持
Prof. Dehan Luo
Architecture of data acquisition systems
Intelligent Sensors System
Prof. Dehan Luo
开关闭合电容充电
开关断开时间
电容放电时间
(1)Aperture time: time required for the switch to open (~50ns) (2)Droop: capacitor discharge (3)Acquisition time: switch operation plus capacitor charging time
Intelligent Sensors System 5-4 School of Information Engineering
Chapter 5 Data Acquisition Circuits
Sample & hold and Basic S/H circuit (Cont.)(续) 3、S/H Response parameters(采样/保持电路响应参数)
5-2
School of Information Engineering
Chapter 5 Data Acquisition Circuits
Sample & hold and Basic S/H circuit 1、A Sample and hold (S/H) circuit has
two basic operating modes(采样与
保持电路有两种基本工作方式)
Prof. Dehan Luo
(a)Sample mode: The output follows the input (b)Hold mode: The output is held constant until sample mode is resumed
(输出保持不变直到采样方式恢复)
5-3
School of Information Engineering
Chapter 5 Data Acquisition Circuits
Sample & hold and Basic S/H circuit (Cont.)(续) 3、Basic S/H circuit (基本采样与保持电路)
2、The main application of S/H circuits is to hold the input signal to an ADC constant during conversion
(采样保持电路主要应用是使加到ADC上的 信号在AD转换期间保持不变)
Intelligent Sensors System
Prof. Dehan Luo
(1)C should be large enough to minimize ‘droop’ caused by leakage currents in Q1 and IC2(电容C应大的足以使因Q1和
IC2漏电流而引起的放电为最小)
(2)C should be sቤተ መጻሕፍቲ ባይዱall enough to track fast signals since it forms a low-pass filter with Q1’s ON resistance! (电容C应小的足以快速跟
Prof. Dehan Luo
(1) Basic elements (基本元件): Voltage followers(电压跟随器), FET switch(场效应开关)
(2) Operation(工作原理) • IC1 provides low Zout version of input signal • Q1 passes the signal during ‘sample’ and disconnects during ‘hold’ • C preserves the value during ‘hold’ • IC2 is a high Zin op-amp to minimize capacitor discharge during ‘hold’
Section Four Digital to analog converters (第四节 数模转换器)
1、Binary weighted ladder 2、R-2R ladder 3、Pulse width modulation
Intelligent Sensors System 5-1 School of Information Engineering
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