最新FPGASystemDesignwithVerilog

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FPGA in Context
Semicustom IC Standard cell (CBIC, ASIC) Masked gate array (MGA) Programmable logic device (PLD)
PLD Complex PLD (CPLD) FPGA
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FPGA System Design with Verilog
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PLD Vendors
Total 1999 PLD Market = $2.6B
Other 9%
Actel 7%
Lattice 16%
Xilinx 35%
Altera 33%
Source: Xilinx University Program Workshop Notes
Aug 9, 2001
FPGA System Design with Verilog
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FPGA Pictures
Board Packages Wafer Die photos
FPGA Pentium II microprocessor
Sources: http://www.xilinx.com/company/press/products/pictures2.htm, http://micro.magnet.fsu.edu/chipshots/pentium/
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FPGA System Design with Verilog
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Programmable I/O Block
Source: Smith, M.J.S., Application-Specific Integrated Circuits, ddison-Wesley, 1997.
Microprocessor/microcontroller Executes a program Fixed hardware and interconnections
Full-custom IC Design at the transistor level
Aug 9, 2001
FPGA System Design with Verilog
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FPGA System Design with Verilog
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Hybrid FPGA / Microcontroller
Triscend E5 CSoC (configurable system-onchip) 8-bit 8051-based microcontroller 40K system gates
FPGASystemDesignwithVeri log
Agenda
FPGA Overview Verilog Overview Combinational Circuits Lab Projects I Sequential Circuits Lab Projects II Lab Projects III
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What is an FPGA?
Field Programmable Gate Array Blank slate for your digital hardware system
Aug 9, 2001
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FPGA System Design with Verilog
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FPGA in Context
enhancements)
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FPGA System Design with Verilog
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Altera FPGA Product Families
APEX-II (up to 7M gates) APEX20K (up to 1.5M gates) Mercury (ASIC replacement, “ASSP”) FLEX 10K
Power distribution Clock distribution Programmable I/O blocks (IOBs)
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FPGA System Design with Verilog
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Configurable Logic Block
Source: Smith, M.J.S., Application-Specific Integrated Circuits,Addison-Wesley, 1997.
FPGA System Design with Verilog
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When to Use an FPGA
Design economics Shortest time to market Lowest NRE cost Highest unit cost
Make quick grab for market share, then do cost reduction with ASICs
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FPGA System Design with Verilog
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Internal Architecture
Array of Configurable Logic Blocks (CLBs) User-defined (SRAM-based) interconnect
between CLBs Dedicated resources
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FPGA System Design with Verilog
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Xilinx FPGA Product Families
Virtex-II (“Platform FPGA, ” 10M gates) Virtex (1M gates), Virtex-E (3M gates) Spartan (low cost ASIC replacement) XC4000 (first FPGA family, now with
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FPGA System Design with Verilog
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FPGA Overview
Aug 9, 2001