6502芯片电路图纸

98 84 87 80 81 Cp2 Cp1 76 138 83 108 83 88 89 98 Cp2
70
60
82
77 68
69 70 71 C1x1 67
32 Cp2 Cp2 Cp1 Cp1
Cp2 Cp2 p2
Cp2
36
E3x4
D flag
98
89 59 83 88
99 100 101
Sync Clock1 1
Cp1 C Cp2 Cp2 Cp2 Cp2
V flag
Cp1 R2x20,7 Cp2
Rdy0 Z flag V flag Cp2 120 132 133 134 135 04 104 Rdy0 G4x12 u2x2 105 i4x4
Cp1
130
130 i4x4 Cp2 i4x4 124
Cp2 121 Cp2 i4x4 Cp2 R2x7 u2x2
x9
ADDR2 Cp2 R3,4x10 Cp2 R3x20,6 NOR0 NAND0 Carry0,in
ADDR2
Cp2
Cp2
Cp2
A0
NAND
Carry Dkx3 Dkx2 Dkx1
R3x5
R3x4
R3x2
R3x1
R3x0
V bit it Cp1 Cp2 R2x20,6
Carry
R2x14 R2x14,7
NAND x8
x1 x2 x3 DATA1 ADDR1 ADDR2 2. op. x5 1. op. x4 x1 x2
Cp2 x3
Cp2 x4 x5
Cp2 x6 x7 Cp2
A7
DATA2 x3 x1 ADDR2 Carry DATA1 Cp2 ADDR1 x2 x4 Cp2 x3
x5 x0 x1 x2 Cp2 x4 ALU6 x20,6 XOR7 ADDR1 DDR1 x15 ALU6 x14 ADDR2 DDR2 x8
XOR5 ADDR1 DDR1 x12 EOR NAND x8 x15 ALU5 x14 ADDR2 DDR2
D5
x1 x2
EOR
x9
NOR
x6 x1 x2 x3 DATA1 ADDR1 ADDR2 1. op. 2. op. x1 x2
x3
Cp2 x3
Cp2 x4 x5
Cp2 x6 x7 Cp2
A5
x4 x5
Carry SUM
ADDR1 ADDR2 x15 x14 x8 x1 x2 x3 x4 x5 x12
D4
x1 x2 x3 DATA2
EOR
NOR R
x6 x3
x9
NAND
DATA1 ADDR1 ADDR2 2. op. 1. op.
x1 x2 x3 x4 x5
Cp2
Cp2
Cp2 x6 x7 Cp2
I flag
Cp1
C1x5
Cp2
NMI
N flag
D7 Clock1 Cp1 Clock1 Cp2
Cp1 Cp2 Rdy0
Cp2 107 108 110 111 112 113
Cp2 i4x4 105 106 06 F4x6
data1,7read
Cp2
98 Rdy0 83 Clock2 D1x1 D1x 55: SBC, ADC #, zero, abs, abs,X ,abs,Y, zero,X ,(zero,X), (zero),Y IRQ Cp2 Rdy0 Cp1 34: ORA, ASL, BIT, AND, ROL, EOR, LSR, ADC, ROR ... abs 49: ORA, AND, EOR, ADC, SBC, CMP, LDA, STA (zero),Y 48: ORA, AND, EOR, ADC, SBC, CMP, LDA, STA (zero,X) 44: ORA, AND, EOR, ADC, SBC, CMP, LDA, STA (zero),Y 43: ORA, AND, EOR, ADC, SBC, CMP, LDA, STA (zero),Y 42: ORA, AND, EOR, ADC, SBC, CMP, LDA, STA (zero,X) 53: CMP #, zero, abs, abs,X ,abs,Y, zero,X ,(zero,X), (zero),Y 35: ORA #, zero, abs, abs,X ,abs,Y, zero,X ,(zero,X), (zero),Y 32: EOR #, zero, abs, abs,X ,abs,Y ,zero,X ,(zero,X) ,(zero),Y 54: SBC #, zero, abs, abs,X ,abs,Y, zero,X ,(zero,X), (zero),Y Rdy0 Cp1 Cp2 Cp1 89 94 Rdy0 95 96 9: LDX, LDY, STX, STY #, zero, abs, zero,X ,zero,Y R3x0 Rdy0 Cp2 Rdy0 0 31 59 Cp1
A4
Carry
D3
x1 x2 x3 DATA2 Cp1 Cp2 Cp2 DATA1 x3 x2 ADDR1 x1 DATA1 Carry x4
SUM
x12 EOR
EOR
x9
NOR
x6 NAND x8 x1 x2 x3 x7 x4 x5 DATA1 ADDR1 ADDR2 1. op. 2. op. x1 x2
C flag
Cp1
Cp1
Cp1
Cp1
Cp1
R/W
R3x5,0
Cp2 E4x1 54
R5x3
Cp2
Cp2
Cp2
83
98
Cp2
Cp2
Cp2
Cp2
Cp2 D flag 29 89 90 91 92 93 94
Cp2 Cp1 Cp1
Cp1
Cp2
Cp2
Rdy0 Cp2 Cp2 Cp2 2 Cp2
89 94 95 96
x7
Carry SUM
x12
D6
x1 x2 x3 DATA2 Cp1 Cp2 Cp2 DAT DATA1 x3 x2 ADDR1 ADD x1 Carry DATA1 ADD ADDR1 x2 x4
EOR
NOR R
x6 x1 x2 x3 x7 x4 x5 DATA1 ADDR1 ADDR2 2. op. 1. op. x1 x2 x3
C1x5
Cp2
Cp2
Cp2
IRQ
25 (BRK)
NMI
Rdy0 Cp2
123 Cp2 i3x3 Cp2 SO
104 Z flag
data1,1
G3x8 119 Cp2 Cp2
Cp1 Cp
Cp1 Rdy0
Cp2
NMI
Cp2 Cp2 h1x1
122 Cp2
h1x1
H4x4 I flag NMI C1x5 Cp1 Cp2 Cp1 Cp2 IRQ
Cp1 Cp2 Cp2 DATA1 x1 x3 x2 ADDR1 x4 Cp2 ADDR1 x2 x4 Cp2 DATA1 DATA1 x3 x1 Carry Carry DATA2 ADDR2 x3 x5 x0 x1 x2 Cp2 x4 Cp1 Cp2 Cp2 DATA1 x3 x2 ADDR1 x1 Carry Carry DATA1 x3 x2 x4 x1 DATA2 ADDR2 x3 Cp2 ADDR1 Cp Cp2 DATA1 x5 x0 x1 x2 Cp2 x4 ADDR1 ALU3 x15 x14 ADDR2 Cp2 x7 ADDR2 Cp2 ADDR2 ALU6 Carry5,in XOR6 x7
Cp1
A15
Cp1
A14
Cp1
A13
Cp1
A12
Cp1
A11
Cp1
A10
Cp1
A9
Cp1
A8
R6502
Cp2
Cp2
Cp2
Cp2
Cp2
Cp2
Cp2
Cp2
x5
Cp2 DATA1 DAT x3 x1
Instruction pointer
DATA1 x3
x1
DATA2 ADDR2 x3 DATA1
D7
x1 x2 x3 DATA2 Cp1 Cp2 Cp2 DAT DATA1 x3 x1 DATA1 Carry ADDR1 ADD x2 x4 Cp2 ADDR1 x2
58
61 62 63 64 65 66
C4x2
R2x8 Cp1 Cp1 Cp2 30
33 34 50 59
48 51 Rdy0
38 39 40 41 42 37 Rdy0 59
19 21 38 51 16 17 18
14
8
10 11 20 12 21 13 15 22
8 9 2
3 4 5 6 7
51
Rdy0 9
Rdy0 24 25 26 27 28 29 74 76
SYNC
48 49 50 51 Rdy0 D4x1 E4x1 Cp1 C Rdy0 Rd F3x51
Rຫໍສະໝຸດ Baiduy0
35 Cp1 Cp2 72 73 78 79
Rdy0
47
Rdy0
F4x6 E4x16 Dkx6 E4x15
Rdy0
42 43 44 45 46
Carry ADDR2 DATA1 x3 x4 Cp2 ADDR1 x2 x1 Carry DATA2 ADDR2 x4 Cp2 x3 DATA1 x5,0 x0 x1 x2 Cp2 x4 R3x5,0 Carry R3x3 R5x4 R5x3 R5x2 R5x1 R4x4 R4x3 R4x2 R4x1 Cp1 Cp2 54 57 Cp2 p2 Cp2
Cp1
ALU2
D0
x1 x2 x3 DATA2 Cp1 Cp2
Carry SUM
ADDR1 x12 x15 x14 x8
EOR
NOR OR
x6 x1 x2 x3 x7 x4 x5 R2x12 R2x9 R2x8 R2x7 7 R2x6 R2x5 DATA1 ADDR1 ADDR2 2. op. R2x4 R2x3 R2x2 R2x1 R1x1 R1x2 R1x3 R1x4 R1x5 R R1x6 R1x7 1. op. x1 x2 x3 x4 x5 x6 x7 Cp2 x3
x0 x1 x2 Cp2
BCD correction
Carry NAND7 AND7 NOR7 OR7 ADDR1 DDR1 ALU7 x15 ADDR2 DDR2
ALU x7
Stack pointer
NOR
x6 x3
X reg
Y reg
SUM
x12 EOR
EOR
x9
x4 Cp Cp2
A reg
x4 Cp2 ADDR2 Cp2 Cp2 Carry7,out
x9
Cp2 x3
Cp2 x4 x5
Cp2 x6 x7 Cp2
A6
NAND
ADDR2 Carry DATA2 x3 x1 ADDR2 x3 x4 Cp2 x3 DATA2 ADDR1 x2 x4 Cp2 Cp DATA1 x5 x0 x1 x2 Cp2 x4 ALU5 AND5 NAND6
Carry SUM
52 53 51
14
12
75
E4x5 C4x4 R2x8 C4x4 E3x4 V flag sync E4x15 E4x16 D flag C flag C1x3 D4x1 D4x E4x1 E4x10 C4x2 E4x4
88 Sync E4x1 Clock1
Cp1 Cp2 Reset Rdy0 Cp1 D2x10 Rdy0 83 Clock2 D2 131 136 131 136 N flag u1x4 136 C flag 131 Cp1 Sync0 E4x15 Rdy0 Sync Cp2 Reset Cp1 ? Rdy0 H4x4 121 125 126 127 128
Carry SUM
x12 EOR
D1
x1 x2 x3 DATA2
EOR
x9
NOR
x6 NAND x8 x1 x2 x3 x7 x4 x5 DATA1 ADDR1 ADDR2 1. 1 op. op 2. op. x1 x2
x3
Cp2 x3
Cp2 x4 x5
Cp2 x6 x7 Cp2 C 2
A1
Cp2 Cp2 DATA1 x3 x2 ADDR1 x1
R2x15
Cp2 C
Cp2
Cp2
Cp1
Cp2
D1x1
Cp2
Cp2
56 E4x6
55 x3 55 50 Cp2 Cp1 Cp1 Cp1 Cp1 Cp2 Cp2 Cp2 Cp2 Cp2 Cp2 Cp2 Cp1 Cp2
Cp2
Cp2
Rdy0 Cp2
Cp2
Cp2
Cp2
Cp1
u1x4 d2x10 83
Cp1
Cp1
x3
Cp2 x3
Cp2 x4 x5
Cp2 x6 x7 Cp2
A3
ADDR2 x3 x1 Carry DATA2 ADDR2 Cp2 ADDR1 x2 x4 x3 Cp2 DATA1 x5 x0 x1 x2 Cp2 x4 ALU2
NOR2
D2
x1 x2 x3 DATA2 Cp1 Cp2 x4
Carry SUM
E4x15
Cp2 E4x1
Cp2
115
Cp1 Rdy0 101 Cp2
Rdy0 G4x6 C1x5 (reset)
Cp1
RDY pin
Rdy0
Cp2
Cp2 Cp1
R/W pin
D flag Cp1
h1x1 h1x1 data1,3
h1x1
Cp1
IRQ, NMI, RESET
C4x2
C flag
data1,6
ADDR1 EOR3 x12 x15 ALU2 x14 ADDR2
EOR
NOR R
x6 x1 x2 x3 x7 x4 x5 DATA1 ADDR1 ADDR2 1. op. 2. op. x1 x2 x3
x9
x8
Cp2 x3
Cp2 x4 x5
Cp2 x6 x7 Cp2
A2
NAND
Carry Cp2 DATA1 x3 x2 ADDR1 x1 Carry DATA1 x3 x2 x1 DATA2 ADDR2 x4 Cp2 ADDR1 x4 Cp2 Cp x3 DATA1 ADDR2 x5 x0 x1 x2 Cp2 ALU1 x4 Cp1 EOR1 AND1 ADDR1 x15 ALU1 x14 ADDR2 NOR2 NAND2